Author: Peter Kapas Date: January 27, 2008 Manufacturer: Crucial Provider: Crucial

« Introduction | A Closer Look » Page 2: Specifications and Packaging

---

Specifications
•Part Number: BL2KIT12864AL1065
•Module Size: 2GB kit (1GBx2)
•Package: Ballistix Tracer 240-pin DIMM (with LEDs)
•Feature: DDR2 PC2-8500
•Configuration: 128Meg x 64
•DIMM Type: UNBUFFERED
•Error Checking: NON-ECC
•Speed: DDR2-1066
•Voltage: 2.2V
•Memory Timings: 5-5-5-15 (CAS-TRCD-TRP-TRAS)
•EPP: Yes

Crucial Ballistix Tracer memory comes with the following:

- Aluminum heat spreader with silk-screened logo
- Limited lifetime warranty
- Free shipping on qualified orders within the contiguous U.S.
- Award-winning customer support and free technical support

What does DDR, CAS, tRCD, tRP, tRAS, tCLK, and EPP mean?

DDR:
This stands for Double Date Rate and that means it doubles the bandwidth of the memory by transferring data twice as fast on both the rising and falling of the clock cycle.

CAS (tCL):
This stands for Column Address Strobe or Column Address Select and that essentially means the number of cycles for the memory to get information and then process that information. Also keep in mind that a lower CAS is much better than a higher CAS, so try and keep CAS as low as possible when overclocking.

tRCD:
This is the delay from the time a row is activated to when the cell (or column) is activated via the CAS signal and data can be written to or read from a memory cell. When memory is accessed sequentially, the row is already active and tRCD will not have much impact. However, if memory is not accessed in a linear fashion, the current active row must be deactivated and then a new row selected/activated. In such an example, low tRCD's can improve performance. However, like any other memory timing, putting this too low for the module can cause instability.

tRP:
RAS Precharge; the time required to switch from one row to the next row. For example: switching internal memory banks.

tRAS:
Memory architecture is like a spreadsheet with row upon row and column upon column, with each row being one bank. For the CPU to access memory, it first must determine which row or bank in the memory is to be accessed and then activate that row with the RAS signal. Once activated, the row can be accessed over and over, until the data is exhausted. This is why tRAS has little effect on overall system performance but could impact system stability if set incorrectly.

tCLK:
This is simply the clock used for the memory. Note that because frequency is 1/t, if memory were running at 100Mhz, the timing of the memory would be 1/100Mhz, or 10nS.

EPP:
This stands for Enhanced Performance Profiles and is a new approach that simplifies overclocking and ensures memory and platform compatibility. This technology was defined to utilize the extra space in the EEPROM to store memory configuration settings that are sufficient to optimize and maximize the performance of a memory module. It basically auto detects your motherboard's chipset and sets the memory timing accordingly. While EEP is nice, many overclockers will be manually adjusting their memory in the motherboard's BIOS.

Packaging

The Crucial Ballistix Tracer 2x 1GB DDR2-8500 Memory Kit came in a small cardboard box that is just enough to fit in two of the memories in it. The box is taped with a Crucial sticker and information about the company, and once you cut or take the sticker off, you grant access to the memories located inside.


When you look inside the box, you will find that the memories are located in two little holes that has hard cardboards on the sides to hold them. Although when I received the memories, they were not in place, but rather just on the side of the box.


When you take out the memories from the box, they are still protected by anti-static bags that will protect the memory from any static electricity. These bags also contain all the information and the barcodes of the memories.

---

« Introduction | A Closer Look » Page 1: Introduction Page 2: Specifications and Packaging Page 3: A Closer Look Page 4: Overclocking, Testing and Results Page 5: Conclusion